Integrated circuits manufactures are constantly striving to reduce semiconductor device sizes. With the rapid advances in wafer fabrication process technology, IC designers are always tempted to increase chip level integration at an ever faster pace. It has been the trend in integrated circuit (IC) technology to make small, high speed and high density devices. Thus, the density of semiconductor devices per unit area of silicon wafer is increased. It follows then that the semiconductor devices, such as transistors and capacitors, must be made smaller and smaller.
In recent years, there has existed a high interest of developing the ball grid array (BGA) package and assembly technology. It is because that the renewed desire in high density hybrid is driven by the requirement of larger numbers of electrical connections, the increasing clock rate of digital systems. However, a conventional lead frame package meets an obstacle to increase the number of the package's lead. Thus, the requirement of the operation speed is limited by such packages. The industry has moved away from the use of pins as connectors for the semiconductor package due to the aforesaid reason and the limitation on the input/output pins. As a result, solder ball have been used to meet the present and further demand, one of such solder ball electrical connection technologies is known as ball grid array (BGA) semiconductor package that is superior to pins. The BGA offers many advantages over conventional packages such as solder ball I/O and high speed due to a short path for signal transformation.
As well known in the art, the BGA package includes a substrate with a semiconductordie formed thereon. A plurality of bond pads are mounted to the top surface of the substrate. Gold wires are electrically connected these bond pads to a plurality of conductive traces formed on the substrate. The conductive traces each terminate with a pad where a solder ball is attached. Typically, an encapsulating material covers the die and the substrate for preventing the moisture. One of such BGA is disclosed in U.S. Pat. No. 5,640,047. In the package, solder balls 24, 25 are connected with a printed wiring board. The surface of the ground plane 22 is made of copper leaf that is covered by a second dielectric layer 26. The first and second outer connecting terminal lands 21, 23 that are exposed to atmosphere by means of flux. A semiconductor die 32 is mounted by using a conductive adhering agent 31. Electrode pads mounted on the die 32 are connected to the wire bonding portions 18.
A further BGA package is developed by Motorola, which can be seen in U.S. Pat. No. 5,583,377. The package 10 includes circuitized substrate 12 having a plurality of conductive traces 14 formed thereon. Conductive pads 16 are formed on the bottom surface of the substrate 12. The electrical signal is routed from the substrate 12 to the die 13 by using wires 19. The conductive pads 16 and solder balls 21 are formed in a matrix configuration for external signal accessing to the die 13. A plurality of vias 18 are extended through the substrate 12 for electrical coupling. The device 10 also has a heat sink 22 having a cavity for receiving the die 13.
However, none of the aforementioned packages can receive multiple semiconductor dies in the device. Thus, what is required is a package having multiple semiconductor dies receiving therein.